1. Field of the Invention
This invention relates to a method of fabricating a high density electrical connecting structure.
2. Description of the Prior Art
The present invention provides a means of electrically interconnecting multiple electrical devices such as integrated circuits having multiple connections of high density with connection means that will allow high speed pulse propogation and high speed power supply through such interconnecting means. The approach utilizes a sacrificial substrate fabrication technique. While conventional printed circuit board connectors can provide some of the characteristics necessary for use in such devices, conventional printed devices cannot achieve the speed and density necessary to electrically interconnect multiple circuits of state of the art semiconductor devices. Furthermore, sacrificial substrate techniques have been developed to form high density layered fan out structures from integrated circuit chips to the chip carrier comprised of metallic conductors and polymer materials. U.S. Pat. No. 4,480,288 to Gazdik et al. discloses such a technique, as does U.S. Pat. No. 4,650,545 to Laakso et al.
The layered fan out structures formed by such techniques are for making short connections from the chip to the chip carrier which are not designed to interconnect a multiple of integrated circuit chips by providing signal and power distribution systems in the device and the fabrication process and the resultant structure are therefore considerably simpler.
Thus, it is one object of the invention to provide a method for fabricating separate but complex electrical interconnecting subassemblies as components of the final interconnection device to maximize yield whereby a subassembly may be tested and then, with the substrate removed but structurally supported after initial fabrication to prevent damage to the subassembly prior to its subsequent assembly to another subassembly, to form the desired interconnection device.
It is another object of the invention to provide a method for fabricating high density electrical interconnection suited for the interconnection of modern digital semiconductor devices.
It is a further object of the invention to provide a method for fabricating a multiple layer interconnection device.
It is an additional object of the invention to provide a method for fabricating a high density electrical interconnection in a manner such that conventional semiconductor wafer handling equipment can be used in the fabrication process.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.